Fabrication of integrated circuit (IC) devices at a modern level of miniaturization demands techniques that can operate at an atomic scale. Certain components of IC devices now have dimensions of tens or hundreds of Angstroms, corresponding to only a few atomic layers of material. For example, gate dielectric in modern IC transistors can have a thickness of only 12 Å, corresponding to only four atomic layers of silicon dioxide. It is often desirable to fine-tune the electronic properties of these components by altering their dimensions, which would involve deposition or removal of only a few atomic layers of material. While atomic layer deposition (ALD) and atomic-scale epitaxial growth techniques have been developed, the methods for controlled removal of one or several atomic layers are still limited.
Atomic layer etching technique (ALET) has been used for controlled etching of silicon and gallium arsenide. ALET involves chemisorption of a halogen, such as chlorine gas on the surface of silicon or GaAs, and subsequent removal of the reaction product through heat, laser or UV irradiation, or exposure to the argon ion beam. The amount of etched material is controlled by the self-limiting nature of chemisorption, and by the number of adsorption-desorption cycles applied to the substrate surface. This technique, although valuable for its purpose of semiconductor etching, is limited to the halogen—silicon chemistry and is not widely applicable. For instance, it cannot be applied to other materials of the IC device, such as silicon dioxide. Furthermore, sputtering during the desorption step is often damaging to the wafer components since it involves bombardment of the wafer surface with high-energy species.
Another specific example of atomic layer etching has been described by Yoder (U.S. Pat. No. 4,756,794). In this case nitrogen dioxide gas is adsorbed onto the surface of diamond (carbon), which is then irradiated by an ion beam. During irradiation NO2 decomposes, and decomposition products oxidize carbon to easily removable gaseous carbon oxides. Again, controlled etching of atomic layer of diamond is achieved due to the self-limiting nature of NO2 adsorption on the surface of the diamond. As in the case of silicon ALET, the described chemistry is not widely applicable. The method also necessarily involves irradiation with high-energy ions, which may be damaging to the wafer. None of the described above methods is applicable to etching of SiO2 on an atomic scale.
Silicon dioxide and its carbon-doped variants are important dielectric materials used in IC devices. Silicon dioxide serves as a dielectric in bulk dielectric layers, as a gate dielectric in transistors, and as a capacitor dielectric in memory devices, such as DRAM. It also is inadvertently formed on the layers of silicon when the partially fabricated wafer is exposed to air. This type of silicon dioxide, known as native oxide, forms a thin film on the layer of silicon. Native oxide film together with oxide residue produced during etching and/or ashing frequently presents a problem for further processing steps. When formed in the bottom of a silicon landed via or contact hole, native oxide and other oxides are highly undesired, since they raise the overall electrical resistance of the via after it is filled with conductive materials. FIG. 1A shows a cross-sectional depiction of a partially fabricated integrated circuit having a via 101 residing in a bulk dielectric layer 103. The via 101 is landed in a silicon-containing transistor source 105. Other components of the transistor, a drain 107 and a gate 109 are also shown. Transistor components reside in the bulk layer of silicon 111. Native oxide film 113 is shown to cover the silicon-containing material in the bottom of the via.
Oxide material is conventionally removed in a pre-clean processing step. The resulting device with a pre-cleaned via is shown in FIG. 1B. A variety of methods can be employed for the pre-clean step, including plasma etching with reactive and/or inert species, dry chemical etching, and wet etching such as HF dip. It should be understood that since native oxide is readily formed when silicon is exposed to ambient air, it is highly desirable to conduct pre-clean step and subsequent via filling step in one apparatus taking care to avoid exposure to oxygen. The via is often filled with a conductive material by a CVD or ALD method and it is therefore highly desirable to conduct the pre-clean step in the deposition apparatus or at least in an apparatus provided in the same vacuum environment as the deposition apparatus. This requirement limits the number of practically feasible pre-clean methods to dry etching processes, which will be discussed further.
As indicated, in a step following the pre-clean, the via 101 is filled with conductive material 115. Referring to FIG. 1C, a cross-sectional depiction of the wafer shows the filled via after the deposition step. The via may be filled with such material as W, Cu, Ru, TiN or WN which can be deposited by a CVD or ALD step.
Several methods have been developed for silicon dioxide removal. It should be understood, that none of these methods can accomplish a well controlled removal of one or several atomic layers of silicon dioxide. All of the methods described below remove bulk amounts of silicon dioxide and are poorly controlled at an atomic level.
Most of silicon dioxide etching methods are relying on silicon dioxide—fluoride chemistry. It is convenient to use this chemistry because it is selective for silicon dioxide and does not affect elemental silicon, and because silicon fluoride products are either gaseous or easily sublimated compounds, and can therefore be easily removed after the etching is complete.
Hydrofluoric acid, HF, does not etch silicon dioxide when dry, but readily reacts with it in the presence of moisture or other catalysts following reactions 1 and 2.6HF+SiO2→H2SiF6+2H2O  (1)H2SiF6→SiF4↑T+2HF↑  (2)The resulting hexafluorosilicic acid, when not in solution, immediately dissociates into gaseous products, silicon tetrafluoride and hydrofluoric acid. Therefore the HF etch in the presence of small amounts of water is a viable method of silicon dioxide removal under essentially “dry etch” conditions. This method, however, is rarely used due to corrosive properties of HF/H2O mixtures, which may damage the process chamber. It is usually preferred to either generate HF in situ from precursors, or to employ a different fluoride source, such as ammonium fluoride (NH4F) or ammonium bifluoride (NH4F.HF). Both of these salts react with silicon dioxide according to reactions 3 and 4.6NH4F+SiO2→(NH4)2SiF6+2H2O+4NH3  (3)3NH4F.HF+SiO2→(NH4)2SiF6+2H2O+NH3  (4)These reactions result in easily removable gaseous and liquid products and in a solid salt, ammonium hexafluorosilicate. This salt is readily decomposed into gaseous products when heated, in what is usually referred to as a sublimation step:(NH4)2SiF6→2NH3↑+SiF4↑+2HF↑  (5)
Ammonium fluoride and ammonium bifluoride cannot be easily introduced into the dry-etch chamber, due to their relatively low vapor pressure, and are most often formed from gaseous precursors within the chamber.
There is a wealth of literature describing deposition of etchants onto the wafer surface coated with oxide. All of these processes are essentially CVD-type processes, in which the reactant gases are introduced into the chamber simultaneously and react in the gas phase to form etchants. The etchants are formed in bulk in the process chamber and are then deposited onto the wafer surface. In most of these processes the amount of deposited etchants is controlled by the flow rate and flow time of the reactant gases, substrate temperature, or chamber pressure. The amount of etched material is subsequently determined from the amount of deposited etchants or from the time that etchants were allowed to react with the underlying layer. These CVD-type processes are not well suited to accurately control the thickness of a layer to be removed and cannot be applied for removal of defined amounts of material on an atomic scale. Although in some cases the amount of deposited etchant can be controlled by the use of microbalance, it is not possible to achieve accurate atomic layer control over material removal by these types of methods.
The precursors used for formation of fluoride etchants in these processes are usually simultaneously introduced into reaction chamber and are allowed to react to produce an etchant which may or may not be deposited onto the wafer surface. Thus an uncontrolled amount of etchant is brought into contact with the on the wafer surface. This etchant then reacts with native oxide layer by any of the reactions 1-5, and the resulting reaction products are removed either by purging or, if ammonium hexafluorosilicate is the product, by a separate sublimation step, followed by purging.
Nishino et al. (U.S. Pat. No. 5,030,319) describes several embodiments of these CVD-type etching methods, which differ in the nature of precursor gases and in the conditions of the processes. For example, the authors describe an embodiment in which NF3 and NH3 gases are reacted in a microwave discharge forming ammonium fluoride and ammonium bifluoride, which deposit onto the wafer and etch silicon dioxide according to reactions 3 and 4. In another example H2O vapor and HF gas are introduced into the chamber to achieve the etching according to reaction 1. In yet another example, SF6 and H2O gases are introduced into the chamber as precursors. Following a microwave discharge, a solution of HF in sulfuric acid is formed, which is deposited onto the wafer surface, and etches silicon dioxide according to equation 1. Similar methods employing etchants produced by the plasma reaction of NH3 and NF3 were disclosed by Phan et al. in a communication at SEMICON (2006, pp. 157-163).
Jeng et al. (U.S. Pat. No. 5,282,925) describes an etching method in which NH3 and HF gases are simultaneously and rapidly introduced into the reaction chamber and their reaction products are condensed onto the wafer. Since NH3 is a base and HF is an acid they react immediately upon mixing, according to reactions 6 and 7. The etching occurs as discussed above.NH3+HF→NH4F  (6)NH3+2HF→NH4F.HF  (7)The only control over the amount of etched material that is possible in this situation is the control over the substrate temperature, composition, and residence time of the reactant film.
In one embodiment, Jeng et al. describes silicon dioxide etching method which has some control over the amount of etched material and Jeng et al. speculate that the method could be used for removing monolayers of material. In this method condensed ammonium bifluoride is placed in a source container connected to the reaction chamber, which contains the substrate. The source container is maintained at a temperature which is lower than the temperature of the wafer substrate. By regulating the pressures and temperatures within the chamber and within the source container, it is conceivable to find conditions when the ammonium bifluoride vapor would form an adsorbed monolayer on the surface of the wafer, and would etch controlled amount of silicon dioxide. The amount of etching is monitored by a quartz crystal microbalance (QCM) coated with silicon dioxide. Although this proposed method may provide some fine control over the etching process, it is laborious and imprecise due to difficulties in QCM calibration.
The CVD-type etchant deposition processes are poorly controlled at an atomic level. These methods are also not well suited for etching relatively small amounts of material, particularly from the high aspect ratio features of the substrate. The bulk amount of etchant deposited onto the substrate surface in these methods usually forms a blanket film of low conformality and uniformity. While these methods sometimes work adequately in the substrates with low aspect ratio features, they do not provide highly conformal and uniform etchant film coverage needed for removal of material from high aspect ratio recesses.
Therefore there is a need for a reliable method for removal of defined amounts of material on an atomic scale with better uniformity and conformality.